1. Field of the Invention
The present invention relates to a data/strobe encoding scheme circuit and a data/strobe encoding method.
2. Description of the Related Art
According to the transmission method of the interface standard “SpaceWire”, serial data (Data) and strobe signals (Strobe) employed, for example, in IEEE1394 are transmitted through mutually different lines. When the data changes, a strobe signal is kept unchanged in an encoding scheme called “Data/Strobe (D/S) encoding (DS-Link encoding)”. According to the conventional art, in a receiver circuit of the D/S encoding scheme, to carry out an operation in which a command received by the receiver is latched and is then passed to a circuit in a succeeding stage, it is required to decode the command including the last bit thereof, and latch or hold the decoded result by a flip-flop (FF) circuit.
However, it is required that if the strobe does not change, a change in the data is used as a clock signal, which is created through an exclusive OR (XOR) operation between the data and the strobe, and then the data value after the change is held by a flip-flop circuit. In the operation, the setup time for the data is substantially equal to the delay time corresponding to the XOR operation. Additionally, it is necessary to decode a command using a plurality of successive bits to deliver the decoded result to a succeeding-stage circuit. For the last bit data of the command, it is not guaranteed that the subsequent clock signal (a change in the data or the strobe) appears after the latching operation. Therefore, it is required to simultaneously obtain the decoded value when the last data bit of the command is latched in the flip-flop circuit. If the operation is conducted without any countermeasures, there occurs a problem that the setup time is insufficient for the input data and the data is not correctly decoded.
To remove the problem in the conventional art, there have been taken countermeasures to provide the setup time for data. Specifically, in the processing of the receiver circuit using the D/S encoding, i.e., D/S link encoding to latch and to pass the command to the succeeding-stage circuit, to conduct a command decoding operation including the last bit of the data bit string, a delay control circuit including an analog circuit adopting a delay element is adopted for the clock signal created through the XOR operation between the data and the strobe, to thereby provide the setup time for data.
However, to implement Large Scale Integration (LSI) of the circuit system in this configuration, since the delay depends on the device characteristic of the LSI circuit, it is required to design a new delay circuit for each device characteristic. Or, it is necessary to replace the circuit section to create the clock signal through the XOR operation between the data and the strobe by an LSI circuit dedicated to control the delay time, to resultantly create a clock signal to which the delay is added.
Therefore, the conventional art is attended with a problem in which the designing job of the delay circuit for each LSI circuit and the use of the dedicated LSI elongate the designing period of time and increase the production cost.